Tag: duab txuam
Algorithm-based Low Power VLSI Architecture Rau 2d-Mesh Video Object Motion Tracking
Tus tshiab VLSI architecture rau video khoom (VO) Cov lus tsa suab nrhiav siv cov tshiab hierarchical adaptive structured mesh topology. Cov txheej txheem mesh muaj qhov txo qis ntawm cov khoom siv uas piav qhia txog mesh topology. Cov lus tsa suab ntawm cov mesh nodes sawv cev rau deformation ntawm VO. Motion them nyiaj ua haujlwm yog ua los ntawm kev siv qhov sib npaug-dawb algorithm rau affine transformation, txo qhov decoder architecture complexity. Pipelining lub affine chav tsev pab txuag hluav taws xob ntau. VO motion-tracking architecture yog ua raws li cov algorithm tshiab. Nws muaj ob qhov tseem ceeb: ib qho video object motion-estimation unit (VAM) thiab ib qho video object motion-compensation unit (VOMC). Lub VOME ua tiav ob qhov laj thawj los tsim kom muaj ib qho kev hloov pauv ntawm cov qauv mesh thiab cov lus tsa suab ntawm cov mesh nodes. Nws siv parallel block txuam cov lus tsa suab-kwv yees kom ua kom zoo dua qhov latency. VOMC ua cov txheej txheem siv, mesh nodes thiab cov lus tsa suab vectors los kwv yees cov duab thaij duab. Nws siv cov xov sib txuas uas txhua txoj xov siv ib txoj hlua txuas ntawm cov scalable affine units. Qhov kev tawm suab-thiaj them nyiaj algorithm no tso cai rau kev siv ib qho yooj yim warping unit los qhia cov qauv hierarchical. Chav tsev affine warps qhov kev ntxhib los mos ntawm ib thaj ntawm txhua theem ntawm hierarchical mesh ntawm nws tus kheej. Lub processor siv lub cim xeeb serialization unit, uas interfaces lub cim xeeb rau cov parallel units. Lub architecture tau prototyped siv sab saum toj-down low-power design methodology. Kev soj ntsuam kev ua tau zoo qhia tau tias cov txheej txheem no tuaj yeem siv rau hauv online siv cov khoom siv video xws li MPEG-4 thiab VRML
Wael Badawy thiab Magdy Bayoumi, “Algorithm-based Low Power VLSI Architecture Rau 2d-Mesh Video Object Motion Tracking,IEEE Transaction ntawm Circuits thiab Systems rau Video Technology, Vol. 12, Tsis muaj. 4, Plaub Hlis Ntuj 2002, pp. 227-237
Ib qho Affine Based Algorithm thiab SIMD Architecture rau Video Compression nrog cov ntawv thov tsawg-nqi
Daim ntawv no nthuav tawm qhov tshiab affine-based algorithm thiab SIMD architecture rau video compression nrog cov ntawv thov qis qis. Lub tswv yim algorithm yog siv rau mesh-raws li kev kwv yees thiab nws muaj npe mesh-raws li square-matching algorithm (MB-SMA). MB-SMA yog ib qho yooj yim version ntawm hexagonal txuam algorithm [1]. Nyob rau hauv no algorithm, txoj cai-angled daim duab peb sab mesh yog siv los ua kom tau txiaj ntsig los ntawm kev sib faib pub dawb algorithm nthuav tawm hauv [2] rau xam cov affine parameters. Lub tswv yim algorithm muaj nqi qis dua li cov hexagonal txuam algorithm thaum nws tsim yuav luag tib lub cim ncov-rau- suab nrov piv. (PSNR) tus nqi. MB-SMA ua tau zoo tshaj qhov feem ntau siv kev kwv yees algorithms nyob rau hauv cov nqe lus ntawm kev suav nqi, efficiency thiab video zoo (i.e., PSNR). MB-SMA yog siv los siv SIMD architecture uas muaj ntau cov txheej txheem ua tau zoo nrog SRAM blocks los siv lub cim xeeb loj hauv bandwidth.. Lub tswv yim architecture xav tau 26.9 ms los ua ib qho CIF video ncej. Yog li ntawd, nws ua tau 37 CIF frames/s. Cov qauv tsim qauv tau tsim los siv Taiwan Semiconductor Manufacturing Company (TSMC) 0.18-μm CMOS thev naus laus zis thiab cov embedded SRAMs tau tsim los siv Virage Logic nco compiler.
Tshaj tawm hauv:
Circuits thiab Systems rau Video Technology, IEEE Transactions ntawm (Ntim:16 , Qhov teeb meem: 4 )
- Nplooj(s):
- 457 – 471
- ISSN :
- 1051-8215
- INSPEC Accession Number:
- 8891917
- DOI:
- 10.1109/TSI.2006.872780
- Hnub tim tshaj tawm :
- Plaub Hlis Ntuj 2006
- Hnub tim ntawm Current Version :
- 01 Tsib 2006
- Hnub tim :
- Plaub Hlis Ntuj 2006
- Txhawb nqa los ntawm :
- IEEE Circuits thiab Systems Society
- Tus tshaj tawm:
- IEEE
Rov qab mus rau ib daim ntawv teev tag nrho Peer-Reviewed Journal Papers
Mohammed Sayed , Wael Badawy, “Ib qho Affine Based Algorithm thiab SIMD Architecture rau Video Compression nrog cov ntawv thov tsawg-nqi“, IEEE Transactions ntawm Circuits thiab Systems rau Video Technology, Vol. 16, Qhov teeb meem 4, pp. 457-471, Plaub Hlis Ntuj 2006. Abstract