Tag: kufananiza zithunzi
Kapangidwe ka Algorithm-Kutengera Mphamvu Yotsika ya VLSI Yakutsata Kanema wa 2d-Mesh Object Motion Tracking
Zomangamanga zatsopano za VLSI za chinthu chamavidiyo (VO) kutsata koyenda kumagwiritsa ntchito buku lakale losinthika lokhazikika la mauna. Ma mesh opangidwa amachepetsa kwambiri kuchuluka kwa ma bits omwe amafotokozera ma mesh topology. Kuyenda kwa ma mesh node kumayimira kusinthika kwa VO. Kulipila koyenda kumachitika pogwiritsa ntchito algorithm yopanda kuchulutsa pakusintha kwa affine, kuchepetsa kwambiri kamangidwe ka decoder. Kuyika mapaipi affine unit kumathandizira kupulumutsa mphamvu kwambiri. Zomangamanga za VO motion-tracking zimachokera ku algorithm yatsopano. Lili ndi zigawo ziwiri zazikulu: chigawo choyezera chinthu cha kanema (VOME) ndi gawo lamavidiyo oyenda-malipiro (Chithunzi cha VOMC). VOME imapanga mafelemu awiri otsatirawa kuti apange mauna okhazikika komanso ma vector oyenda a ma mesh node.. Imagwiritsira ntchito magawo ofananirako ofananira ndi ma motion-estimation unit kuti akwaniritse latency. VOMC imakonza mawonekedwe ofotokozera, ma mesh node ndi ma vector oyenda kuti mulosere mawonekedwe a kanema. Imayika ulusi wofananira momwe ulusi uliwonse umagwiritsa ntchito unyolo wamapaipi a scalable affine unit.. Kuyenda-malipiro a aligorivimu amalola kugwiritsa ntchito gawo limodzi losavuta la warping kupanga mapu a dongosolo. Gawo logwirizana limapotoza mawonekedwe a chigamba pamlingo uliwonse wa mauna otsogola pawokha. Purosesa imagwiritsa ntchito gawo lokumbukira kukumbukira, zomwe zimagwirizanitsa kukumbukira kumayunitsi ofanana. Zomangamangazo zakhala zikugwiritsidwa ntchito pogwiritsa ntchito njira yopangira mphamvu zotsika pansi. Kusanthula magwiridwe antchito kukuwonetsa kuti purosesa iyi itha kugwiritsidwa ntchito pamakanema otengera zinthu pa intaneti monga MPEG-4 ndi VRML.
Wael Badawy ndi Magdy Bayoumi, “Kapangidwe ka Algorithm-Kutengera Mphamvu Yotsika ya VLSI Yakutsata Kanema wa 2d-Mesh Object Motion Tracking,” The IEEE Transaction on Circuits and Systems for Video Technology, Vol. 12, Ayi. 4, Epulo 2002, pp. 227-237
An Affine Based Algorithm ndi SIMD Architecture for Video Compression with Low Bit-rate Applications
Pepalali likuwonetsa njira yatsopano yolumikizirana ndi affine-based algorithm ndi SIMD yophatikizira makanema okhala ndi mapulogalamu otsika kwambiri.. Algorithm yomwe ikufunsidwa imagwiritsidwa ntchito poyerekezera ndi ma mesh-based motion ndipo imatchedwa mesh-based square-matching algorithm. (MB-SMA). MB-SMA ndi mtundu wosavuta wa ma aligorivimu a hexagonal [1]. Mu algorithm iyi, mauna atatu akona yakumanja amagwiritsidwa ntchito kuti apindule ndi kuchulutsa kwaulere kowonetsedwa [2] kwa computing affine parameters. Ma algorithm omwe akufunsidwa amakhala ndi mtengo wocheperako poyerekeza ndi ma aligorivimu a hexagonal pomwe amatulutsa chiwopsezo chofananira chamtundu womwewo. (Zithunzi za PSNR) makhalidwe abwino. MB-SMA imapambana ma algorithms omwe amagwiritsidwa ntchito nthawi zambiri potengera mtengo wamakompyuta., bwino komanso khalidwe lamavidiyo (i.e., Zithunzi za PSNR). MB-SMA imayendetsedwa pogwiritsa ntchito zomangamanga za SIMD momwe zinthu zambiri zosinthira zidaphatikizidwa ndi ma block a SRAM kuti agwiritse ntchito bandwidth yayikulu yamkati.. Zomangamanga zomwe zikufunidwa zikufunika 26.9 ms kuti akonze chithunzi chimodzi cha kanema wa CIF. Choncho, imatha kukonza 37 CIF mafelemu/s. Zomangamanga zomwe zikufunsidwazo zidapangidwa pogwiritsa ntchito Taiwan Semiconductor Manufacturing Company. (Mtengo wa TSMC) 0.18-μm ukadaulo wa CMOS ndi ma SRAM ophatikizidwa apangidwa pogwiritsa ntchito Virage Logic memory compiler.
Zasindikizidwa mkati:
Maulendo ndi Kachitidwe ka Video Technology, IEEE Transactions pa (Voliyumu:16 , Nkhani: 4 )
- Tsamba(s):
- 457 – 471
- ISSN :
- 1051-8215
- Nambala Yowonjezera ya INSPEC:
- 8891917
- DOI:
- 10.1109/TCSVT.2006.872780
- Tsiku Lofalitsidwa :
- Epulo 2006
- Deti la Current Version :
- 01 Mulole 2006
- Tsiku losindikiza :
- Epulo 2006
- Mothandizidwa ndi :
- IEEE Circuits and Systems Society
- Wofalitsa:
- IEEE
Bwererani ku mndandanda wathunthu wa Mapepala Owunikiridwa ndi Anzako
Mohammed Sayed , Wael Badawy, “An Affine Based Algorithm ndi SIMD Architecture for Video Compression with Low Bit-rate Applications“, IEEE Transactions on Circuits and Systems for Video Technology, Vol. 16, Nkhani 4, pp. 457-471, Epulo 2006. Ndemanga