Tag: ho bapisa setšoantšo

 
+

Algorithm-E Thehiloe ho Low Power VLSI Architecture Bakeng sa 2d-Mesh Video Object Motion Tracking

Mohaho o mocha oa VLSI oa ntho ea video (VO) ho latedisa motsamao ho sebedisa bukana ya maemo a phahameng a fetofetohang a mesh topology. Mesh e hlophisitsoeng e fana ka phokotso e kholo ea palo ea li-bits tse hlalosang mesh topology. Ho sisinyeha ha li-mesh node ho emela deformation ea VO. Matšeliso a ts'ebetso a etsoa ho sebelisoa algorithm ea mahala ea ho atisa bakeng sa phetoho ea affine, ho fokotsa haholo ho rarahana ha meralo ea li-decoder. Ho kenya liphaephe ho thusa ho boloka matla haholo. Moralo oa VO motion- tracking o ipapisitse le algorithm e ncha. E na le likarolo tse peli tse kholo: yuniti ea khakanyo ea motsamao oa ntho ea video (KHABANE) le yuniti ea puseletso ea ntho ea video (VOMC). VOME e sebetsana le liforeimi tse peli tse latelang ho hlahisa mesh e hlophisitsoeng ea maemo a holimo le li-vector tsa mesh node.. E sebelisa li-parallel block tse tsamaellanang le litekanyetso tsa ho sisinyeha ho ntlafatsa latency. VOMC e sebetsa moralo oa litšupiso, mesh node le li-vector tse tsamaeang ho bolela esale pele foreimi ea video. E sebelisa likhoele tse bapileng moo khoele e 'ngoe le e 'ngoe e sebelisang ketane e kentsoeng ka liphaephe ea li-scalable affine units.. Algorithm ena ea puseletso ea motsamao e lumella tšebeliso ea yuniti e le 'ngoe e bonolo ea warping ho etsa' mapa oa sebopeho sa maemo a phahameng.. The affine unit e sotha sebopeho sa patch maemong afe kapa afe a hierarchical mesh ka boikemelo. Motlakase o sebelisa yuniti ea serilization ea memori, e kopanyang memori ho diyuniti tse bapileng. Meaho e entsoe prototype ho sebelisoa mokhoa oa ho theha matla a tlase a tlase. Tlhahlobo ea ts'ebetso e bonts'a hore processor ena e ka sebelisoa lits'ebetsong tsa video tse thehiloeng marang-rang tse kang MPEG-4 le VRML.

Wael Badawy le Magdy Bayoumi, “Algorithm-E Thehiloe ho Low Power VLSI Architecture Bakeng sa 2d-Mesh Video Object Motion Tracking,” The IEEE Transaction on Circuits and Systems for Video Technology, Moq. 12, Che. 4, Mmesa 2002, maq. 227-237

+

An Affine Based Algorithm le SIMD Architecture bakeng sa Khatello ea Video e nang le lits'ebetso tse tlase tsa sekhahla sa Bit

Pampiri ena e fana ka algorithm e ncha e thehiloeng ho affine le meralo ea SIMD bakeng sa compression ea video e nang le lits'ebetso tse tlase.. Algorithm e reriloeng e sebelisoa bakeng sa khakanyo ea mesh-based motion 'me e bitsoa algorithm ea mesh-based square-matching algorithm. (MB-SMA). MB-SMA ke mofuta o nolofalitsoeng oa algorithm ea hexagonal e bapisang [1]. Ka algorithm ena, letlooeng la khutlotharo le letona le sebelisoa ho rua molemo ho algorithm ea mahala ea ho atisa ho hlahisoa ka har'a [2] bakeng sa komporo ea li-parameter tsa affine. Algorithm e reriloeng e na le litšenyehelo tse tlase tsa computational ho feta algorithm ea hexagonal e bapisang ha e ntse e hlahisa karolelano e lekanang ea tlhōrō ea lerata. (PSNR) litekanyetso. MB-SMA e feta mekhoa e tloaelehileng ea likhakanyo tsa motsamao ho latela litšenyehelo tsa khomphutha., katleho le boleng ba video (i.e., PSNR). MB-SMA e kengoa ts'ebetsong ho sebelisoa moralo oa SIMD moo palo e kholo ea likarolo tsa ts'ebetso e kentsoeng ka li-blocks tsa SRAM ho sebelisa bandwidth e kholo ea memori ea kahare.. Litlhoko tsa meralo e sisintsoeng 26.9 ms ho sebetsa foreimi e le 'ngoe ea video ea CIF. Ka hona, e ka sebetsa 37 CIF liforeimi/s. Mohaho o reriloeng o entsoe prototype ho sebelisoa Taiwan Semiconductor Manufacturing Company. (TSMC) 0.18-Theknoloji ea μm CMOS le li-SRAM tse kenyellelitsoeng li entsoe ho sebelisoa pokello ea memori ea Virage Logic.

E hatisitsoe ka hare:

Lipotoloho le Litsamaiso tsa Theknoloji ea Video, IEEE Transactions on (Bolumo:16 , Hlahisa: 4 )

Khutlela lenaneng le felletseng la Lipampiri tsa Likoranta tse Hlahlobong ke Lithaka

Mohammed Sayed , badawy@waelbadawy.com, “An Affine Based Algorithm le SIMD Architecture bakeng sa Khatello ea Video e nang le lits'ebetso tse tlase tsa sekhahla sa Bit“, IEEE Transactions on Circuits and Systems for Video Technology, Moq. 16, Hlahisa 4, maq. 457-471, Mmesa 2006. Kakaretso