Tag: discrete wavelet transforms
MRI Data Compression Using a 3-D Discrete Wavelet transform
A low-power system that can be used to compress MRI data and for other medical applications is described. The system uses a low power 3-D DWT processor based on a centralized control unit architecture. The simulation results show the efficiency of the wavelet processor. The prototype processor consumes 0.5 W with total delay of 91.65 ns. The processor operates at a maximum frequency of 272 MHz. The prototype processor uses 16-bit adder, 16-bit Booth multiplier, and 1 kB cache with a maximum of 64-bit data bandwidth. Lower power has been achieved by using low-power building blocks and the minimal number of computational units with high throughput.
Engineering in Medicine and Biology Magazine, IEEE (Volume:21 , Issue: 4 )
- 95 – 103
- ISSN :
- INSPEC Accession Number:
- Date of Publication :
- Jul/Aug 2002
- Date of Current Version :
- 07 November 2002
- Issue Date :
- Jul/Aug 2002
- Sponsored by :
- IEEE Engineering in Medicine and Biology Society
Wael Badawy, Guoqing Zhang, Mike Talley, Michael Weeks and Magdy Bayoumi, “MRI Data Compression Using a 3-D Discrete Wavelet transform,” The IEEE Engineering in Medical and Biology Magazine, Vol. 21, Issue 4, July/August 2002, pp. 95-103.
An Efficient Architecture for a Lifted 2D Biorthogonal DWT
This paper presents a new algorithm for a 2D non-separable lifted bi-orthogonal wavelet transform. The algorithm is derived by factoring complementary pairs of wavelet transform 2D filters. The results are efficient architectures for real time signal processing, which do not require transpose memory for the 2D processing of data. The proposed architecture exploits in place implementation, inherit from the algorithm, and can take advantage of both vertical and horizontal parallelism in the direct implementation. The processing in our architecture is scheduled by carefully pipelining the lifted steps, which allows for up to four times faster processing than the direct implementation. The proposed architecture operates at high speed, consumes low power and has reduced computational complexity as compared to previously published filter and lifted based bi-orthogonal wavelet architectures.
Mehboob Alam , Wael Badawy, Vassil Dimitrov and Graham Jullien, “An Efficient Architecture for a Lifted 2D Biorthogonal DWT,” The Journal of VLSI Signal Processing , Volume 40, Issue 3, July 2005, pp. 335 – 342