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Interpolation-Free Fractional-Pixel Motion Estimation Algorithms with Efficient Hardware Implementation`

Abstract

This paper presents interpolation-free fractional-pixel motion estimation (FME) algorithms and efficient hardware prototype of one of the proposed FME algorithms. The proposed algorithms use a mathematical model to approximate the matching error at fractional-pixel locations instead of using the block matching algorithm to evaluate the actual matching error. Hence, no interpolation is required at fractional-pixel locations. The matching error values at integer-pixel locations are used to evaluate the mathematical model coefficients. The performance of the proposed algorithms has been compared with several FME algorithms including the full quarter-pixel search (FQPS) algorithm, which is used as part of the H.264 reference software. The computational cost and the performance analysis show that the proposed algorithms have about 90% less computational complexity than the FQPS algorithm with comparable reconstruction video quality (i.e., approximately 0.2 dB lower reconstruction PSNR values). In addition, a hardware prototype of one of the proposed algorithms is presented. The proposed architecture has been prototyped using the TSMC 0.18 μm CMOS technology. It has maximum clock frequency of 312.5 MHz, at which, the proposed architecture can process more than 70 HDTV 1080p fps. The architecture has only 13,650 gates. The proposed architecture shows superior performance when compared with several FME architectures.

M. Sayed, W. Badawy, and G. Jullien, “Interpolation-Free Fractional-Pixel Motion Estimation Algorithms with Efficient Hardware Implementation,” the Journal of Signal Processing Systems. Volume 67, Issue 2 , pp 139-155, May 2012.
 Link to the list of other Peer Journal Publications

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A Prototyping Virtual Socket System-On-Platform Architecture with a Novel ACQPPS Motion Estimator for H.264 Video Encoding Applications

Abstract

H.264 delivers the streaming video in high quality for various applications. The coding tools involved in H.264, however, make its video codec implementation very complicated, raising the need for algorithm optimization, and hardware acceleration. In this paper, a novel adaptive crossed quarter polar pattern search (ACQPPS) algorithm is proposed to realize an enhanced inter prediction for H.264. Moreover, an efficient prototyping system-on-platform architecture is also presented, which can be utilized for a realization of H.264 baseline profile encoder with the support of integrated ACQPPS motion estimator and related video IP accelerators. The implementation results show that ACQPPS motion estimator can achieve very high estimated image quality comparable to that from the full search method, in terms of peak signal-to-noise ratio (PSNR), while keeping the complexity at an extremely low level. With the integrated IP accelerators and optimized techniques, the proposed system-on-platform architecture sufficiently supports the H.264 real-time encoding with the low cost.

Download A Prototyping Virtual Socket System-On-Platform Architecture with a Novel ACQPPS Motion Estimator for H.264 Video Encoding Applications

 

Yifeng Qiu and Wael Badawy, “A Prototyping Virtual Socket System-On-Platform Architecture with a Novel ACQPPS Motion Estimator for H.264 Video Encoding Applications” EURASIP Journal on Embedded Systems, Volume 2009

Link to the list of other Peer Journal Publications

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Efficient Variable Block Size Selection for AVC Low Bitrate Applications

 

ABSTRACT

The Advanced Video Coding (AVC) standard proposes the usage of Variable Block Size (VBS) motion-compensated prediction and mode decision aiming for an optimized Rate-Distortion (R-D) performance. Unlike Fixed Block Size (FBS) motion-compensated prediction, where all regions of the pictures are treated similarly in terms of temporal prediction, VBS increases the efficiency of encoding by allowing more active regions to be represented with more bits than less active ones. The main concern regarding the usage of VBS motion-compensated prediction is the dramatic increase it adds to the encoder computational requirements, which not only prevents the encoder from satisfying real-time constraints, but also makes it impractical for hardware implementation. This paper presents an efficient VBS selection scheme, which can be applied to any VBS Motion Estimation (ME) module, leading to significant reduction in its computational requirements with minor loss in the quality of the reconstructed picture. The computational requirements reduction is achieved by minimizing the number of required ME searches and simplifying the Mode Decision (MD) operation. In order to meet different applications’ demands, the proposed algorithm can be adjusted to function at any of three operating points, trading off computational requirements with R-D performance. In the paper, the algorithm is described in detail, focusing on the theoretical computational requirements savings. This theoretical analysis is then supported with simulation results performed on three benchmark video sequences with various types of motion. Keywords-H.264/AVC, motion estimation, variable block size.

 

Download from here

Reference: Ihab Amer, Wael Badawy, Graham Jullien, Adrian Chirila-Rus, Robert Turney, and Rana Hamed, “Efficient Variable Block Size Selection for AVC Low Bitrate Applications,” IARIA on-line journals, 2010 Vol. 1&2, July 2010.

Link to the list of other Peer Journal Publications

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Self-Represented Litigant is a choice

Self-Represented Litigant: A person (party) who advocates on his or her own behalf before a court, rather than being represented by an attorney. These litigants are also known as pro se or pro per litigants.

Cases with Self-Represented Litigants: Legal cases in which one or more parties is self-represented.

People may be self-represented for many reasons, and for the most part do not choose to be self- represented. SRLs are often particularly vulnerable in terms of a relative lack of education, income and assets. They may be grouped into seven overlapping categories:

  • People with a lack of social resources (low income, low education, low literacy, etc.).
  • Low income SRLs with some social resources (people who cannot afford a lawyer but who have sufficient social resources and education to seek available services).
  • SRLs living with social barriers that interfere with accessing justice (i.e. people living with challenges resulting from physical or mental differences, language and cultural barriers, people living in remote locations, etc.).
  • SRLs who are unable to find a lawyer (usually people who live in small towns or remote areas).
  • SRLs who were previously represented but who are no longer represented (usually in lengthy cases with no permanent resolution).
  • SRLs in cases where representation is said not to be necessary (i.e. small claims, traffic court, etc.).
  • SRLs who could access representation but prefer to self-represent (usually well-educated people who distrust the legal profession). SRLs in this category have been found to be a significant minority of the overall SRL population.

SRL is a choice that we all can make and we can Win!!!

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Seven Step Strategy for conducting preliminary searches of U.S. patents and published applications

This is a suggested Seven Step Strategy for conducting preliminary searches of U.S. patents and published applications using free online resources of the USPTO and its bi-lateral partner EPO (European Patent Office).  Patent and Trademark Resource Centers (PTRCs) (www.uspto.gov/ptrc) are available nationwide to provide training on this Seven Step Strategy.

PTRCs provide online access to the PatFT (Patents Full-Text and Image) and AppFT (Applications Full-Text and Image) databases on the USPTO website and the Espacenet Worldwide Database on the EPO website. In addition, most PTRCs provide access to additional USPTO patent databases available through PubWEST (Public version of the Web-based Examiners Search Tool) and PubEAST (Public version of the Examiners Assisted Search Tool). Always call your nearest PTRC to make an appointment before visiting to make the best use of your time.

The use of patent classification in searching U.S. patents and published applications usually results in a more comprehensive search than one done by word and phrases (keyword searching). Because keyword searching must anticipate the often technical language of patents, it serves best as a supplement to a classification search. Accordingly, patent classification searching is the focus of the Seven Step Strategy.

The USPTO has transitioned from using the over 100 year old U.S. Patent Classification (USPC) system to Cooperative Patent Classification (CPC), a new classification system jointly developed with the European Patent Office (EPO). The USPTO currently only uses CPC for classifying new utility patent documents; however, it will continue to use U.S. Patent Classification for classifying design and plant patents. This version of the Seven Step Strategy reflects this transition to the primary use of Cooperative Patent Classification in utility patent publication searching.

The Seven Steps in a Preliminary Search of U.S. Patents and Published Patent Applications

  1. Brainstorm terms to describe your invention based on its purpose, composition and use.
  2. Use these terms to find initial relevant Cooperative Patent Classification using the USPTO website’s Site Search box(www.uspto.gov). In the Site search box found in the top right hand corner of the home page enter “CPC Scheme [plus keywords(s) describing invention]”; for example, if you were trying to find CPC Classifications for patents related to umbrellas, you would enter “CPC Scheme umbrella”. Scan the resulting classification’s Class Scheme (class schedules) to determine the most relevant classification to your invention. If you get zero results in your Site Search, consider substituting the word(s) you are using to describe your invention with synonyms, such as the alternative terms you came up with in Step 1. For example, if you find searching for “CPC Scheme car mirror” is getting unsatisfactory results, try searching instead with “CPC Scheme vehicle mirror.” (If you continue to be disappointed with the CPC Classification search results, look for your search word in the International Patent Classification Catchword Index https://web2.wipo.int/ipcpub/#¬ion=cw; CPC is based on International Patent Classification).
  1. Verify the relevancy of CPC classification you found by reviewing the CPC Classification Definitionlinked to it (if there is one).
  2. Retrieve U.S. patent documents with the CPC classification you selected in the PatFT (Patents Full-Text and Image) database (https://patft.uspto.gov). Review and narrow down the most relevant patent publications by initially focusing on the front page information of abstract and representative drawings.
  3. Using this selected set of most relevant patent publications, review each one in-depth for similarity to your own invention, paying close attention to the additional drawings pages, the specification and especially the claims. References cited by the applicant and/or patent examiner may lead you to additional relevant patents.
  4. Retrieve U.S. published patent applications with the CPC classification you selected in Step 3 in the AppFT (Applications Full-Text and Image) database (https://appft.uspto.gov). Use the same search approach used in Step 4 of first narrowing down your results to the most relevant patent applications by studying the abstract and representative drawings of each on its front page. Then examine the selected published patent applications closely, paying close attention to the additional drawings pages, the specifications and especially the claims.
  5.  Broaden your search to find additional U.S. patent publications using keyword searching in PatFT or AppFT databases, classification searching of non-U.S. patents on the European Patent Office’s Worldwide Espacenet patent database (https://worldwide.espacenet.com and searching non-patent literature disclosures of inventions using the free electronic and print resources of your nearest Patent and Trademark Resource Center (https://www.uspto.gov/ptrc).

 

For more information email me badawy@badawy.ca

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Automatic License Plate Recognition (ALPR): A State-of-the-Art Review

Abstract:

Automatic license plate recognition (ALPR) is the extraction of vehicle license plate information from an image or a sequence of images. The extracted information can be used with or without a database in many applications, such as electronic payment systems (toll payment, parking fee payment), and freeway and arterial monitoring systems for traffic surveillance. The ALPR uses either a color, black and white, or infrared camera to take images. The quality of the acquired images is a major factor in the success of the ALPR. ALPR as a real-life application has to quickly and successfully process license plates under different environmental conditions, such as indoors, outdoors, day or night time. It should also be generalized to process license plates from different nations, provinces, or states. These plates usually contain different colors, are written in different languages, and use different fonts; some plates may have a single color background and others have background images. The license plates can be partially occluded by dirt, lighting, and towing accessories on the car. In this paper, we present a comprehensive review of the state-of-the-art techniques for ALPR. We categorize different ALPR techniques according to the features they used for each stage, and compare them in terms of pros, cons, recognition accuracy, and processing speed. Future forecasts of ALPR are given at the end.

Published in:

Circuits and Systems for Video Technology, IEEE Transactions on  (Volume:23 ,  Issue: 2 )

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Alberta Oil and Gas Mission to Vietnam

Alberta Government        Canada

                        


Ho Chi Minh and Vung Tau City 
November 16-20, 2015

 

The Government of Alberta’s Ministry of International and Intergovernmental Relations in partnership with the Department of Foreign Affairs, Trade and Development Canada (DFATD) is organizing an oil and gas trade and investment mission to Vietnam with a focus on energy efficiency.

The following cities will be included in the mission:

1) Ho Chi Minh city (November 16 -18, 2015)
2) Vung Tau city  (November 19-20, 2015)
Don’t miss this opportunity to showcase your goods, services and solutions and gather first-hand market intelligence and create new business opportunities in Vietnam’s oil and gas sector.

Mission overview:
 
Participating companies will meet with national and international oil companies, producers, oilfield service companies, engineering procurement and construction (EPC) contractors, operators and relevant organizations in these markets who are trying to strengthen or add services/equipment to their current portfolios.
Companies with expertise in energy efficiency, including:

· Enhanced oil recovery technologies and equipment
· Well services (coil tubing, stimulation, pressure services, etc.)
· Surface facilities
· Processing facilities and equipment
· Training (upstream, midstream and downstream)
· Oil and gas equipment transportation
· Information and Communication Technologies

 

Planned activities:
 
1) Group procurement meetings, one-on-one meetings with potential JVs, agents, producers, etc.
2) Briefings to understand Vietnam market place
3) Technical seminars where Alberta companies will have the opportunity to showcase their  technologies with local decision makers
4) Networking events

 

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On-Chip Electrical Field Sensing For Lab-On-A-Chip Applications

 

Authors: Yehya H. Ghallab, and Wael Badawy

Abstract:  This paper presents a novel CMOS electric field sensor, termed as a Differential Electric Field Sensitive Field Effect Transistor (DeFET). It’s based on a standard 0.18μm CMOS technology. The DeFET shows a sensitivity of 76 μA/V/μm. Also, the DefET’s theory of operation is presented and discussed. Both the experimental and simulation results confirm the DeFET’s theory of operation is presented.

Link to the paper

Link to download the ECS Trans.-2006-Badawy-1-15

Link to the list of other Peer Journal Publications

Reference:  Yehya H. Ghallab, and Wael Badawy, “On-chip Electrical Field Sensing for Lab-on-a-chip applications“, ElectroChemical Transaction, 1, (28) 1 (2006), pp. 1-15.

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Patent List has been updated

 

The patent list has been updated , please check

https://www.badawy.ca/patents/

The summary is as follows:

9 US patents

8 Canadian Patents

1 WO

1 EU

Technologies under confidential patent disclosures, are not listed

Translation button
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My site in multi-language using auto translation.

 

Today, I enabled the auto-translation. Please, check my site www.badawy.ca and let me know what do you think and if you can help me fixing the translation.

Looking forward to hear from you.

Wael Badawy