A Novel Current-Mode Instrumentation Amplifier Based on Operational Floating Current Conveyor,
This paper presents a novel current-mode instrumentation amplifier (CMIA) that utilizes an operational floating current conveyor (OFCC) as a basic building block. The OFCC, as a current-mode device, shows flexible properties with respect to other current- or voltage-mode circuits. The advantages of the proposed CMIA are threefold. First, it offers a higher differential gain and a bandwidth that is independent of gain, unlike a traditional voltage-mode instrumentation amplifier. Second, it maintains a high common-mode rejection ratio (CMRR) without requiring matched resistors, and finally, the proposed CMIA circuit offers a significant improvement in accuracy compared to other current-mode instrumentation amplifiers based on the current conveyor. The proposed CMIA has been analyzed, simulated, and experimentally tested. The experimental results verify that the proposed CMIA outperforms existing CMIAs in terms of the number of basic building blocks used, differential gain, and CMRR.
Instrumentation and Measurement, IEEE Transactions on (Volume:54 , Issue: 5 )
Yehya H. Ghallab, and Wael Badawy, Karan V.I.S. Kaler and Brent J. Maundy, “A Novel Current-Mode Instrumentation Amplifier Based on Operational Floating Current Conveyor,” IEEE Transaction on Instrumentation and Measurement, Volume 4, October 2005, pp. 1941 – 1949.
An Affine Based Algorithm and SIMD Architecture for Video Compression with Low Bit-rate Applications
This paper presents a new affine-based algorithm and SIMD architecture for video compression with low bit rate applications. The proposed algorithm is used for mesh-based motion estimation and it is named mesh-based square-matching algorithm (MB-SMA). The MB-SMA is a simplified version of the hexagonal matching algorithm . In this algorithm, right-angled triangular mesh is used to benefit from a multiplication free algorithm presented in  for computing the affine parameters. The proposed algorithm has lower computational cost than the hexagonal matching algorithm while it produces almost the same peak signal-to-noise ratio (PSNR) values. The MB-SMA outperforms the commonly used motion estimation algorithms in terms of computational cost, efficiency and video quality (i.e., PSNR). The MB-SMA is implemented using an SIMD architecture in which a large number of processing elements has been embedded with SRAM blocks to utilize the large internal memory bandwidth. The proposed architecture needs 26.9 ms to process one CIF video frame. Therefore, it can process 37 CIF frames/s. The proposed architecture has been prototyped using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18-μm CMOS technology and the embedded SRAMs have been generated using Virage Logic memory compiler.
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Mohammed Sayed , Wael Badawy, “An Affine Based Algorithm and SIMD Architecture for Video Compression with Low Bit-rate Applications“, IEEE Transactions on Circuits and Systems for Video Technology, Vol. 16, Issue 4, pp. 457-471, April 2006. Abstract