Category: Journal Papers

 
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A Computational Memory Architecture for MPEG-4 Applications with Mobile Devices

  This paper presents a Computational Memory architecture for MPEG-4 applications with mobile devices. The proposed architecture is used for real-time block-based motion estimation, which is the most computational intensive task in the video encoder. It uses the exhaustive block-matching algorithm (EBMA) for motion estimation. The proposed architecture consists ofRead More

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A New Topology for a Current-mode Wheatstone Bridge

This paper presents a new topology for a current-mode Wheatstone bridge (CMWB) that uses an operational floating current conveyor (OFCC) as a basic building block. The proposed CMWB has been analyzed, simulated, implemented, and experimentally tested. The experimental results verify that the proposed CMWB outperforms existing CMWBs in terms ofRead More

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DeFET: A Novel CMOS Electric-Field Sensor for Lab-on-a-Chip and Biomedical Applications

This paper presents a novel CMOS electric-field sensor, it is called the “differential electric-field sensitive field-effect transistor” (DeFET), which is based on a standard 0.18-mum Taiwan Semiconductor Manufacturing Company (TSMC) CMOS technology. The DeFET shows a sensitivity of 51.7 mV/(V/mum). This paper also describes the DeFET’s theory of operation inRead More

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The Operational Floating Current Conveyor and Its Application

A five-port general-purpose analog building block, termed as an Operational Floating Current Conveyor (OFCC), is described. The OFCC combines the features of current feedback operational amplifier, second-generation current conveyor and operational floating conveyor. An implementation scheme of the OFCC is described and its terminal operational characteristics are used to yieldRead More

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A Simplified 8×8 Transformation And Quantization Real-Time Ip-Block For Mpeg-4 H.264/Avc Applications: A New Design Flow Approach

Abstract Current multimedia design processes suffer from the excessively large time spent on testing new IP-blocks with references based on large video encoders specifications (usually several thousands lines of code). The appropriate testing of a single IP-block may require the conversion of the overall encoder from software to hardware, whichRead More

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CAVLC Encoder Design for Real-Time Mobile Video Applications

Abstract This brief presents a new context-based adaptive variable length coding (CAVLC) architecture. The prototype is designed for the H.264/AVC baseline profile entropy coder. The proposed design offers area savings by reducing the size of the statistic buffer. The arithmetic table elimination technique further reduces the area. The split VLCRead More

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Video-based Automatic Incident Detection for Intelligent Transportation systems: The Outdoor Environmental Challenges

Video-based automatic incident detection (AID) systems are increasingly being used in intelligent transportation systems (ITS). Video-based AID is a promising method of incident detection. However, the accuracy of video-based AID is heavily affected by environmental factors such as shadows, snow, rain, and glare. This paper presents a review of theRead More

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High-Throughput Identification and Classification Algorithm for Leukemia Population Statistics

Abstract: Early detection of leukemia and reduced risk to human health can result from interdisciplinary integration of image analysis with clinical experimental results. Image analysis relies on efficient and reliable processing algorithms to make quantitative judgments on image data. This article presents the design and implementation of an efficient andRead More

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A Robust Video-Based Algorithm for Detecting Snow Movement in Traffic Scenes

Abstract Video-based Automatic Incident Detection (AID) systems are widely deployed in many cities for detecting traffic incidents to provide smoother, safer and congestion free traffic flow. However, the accuracy of an AID system operating in an outdoor environment suffers from high false alarm rates due to environmental factors. These factorsRead More

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Towards an H.264/AVC HW/SW Integrated Solution: An Efficient VBSME Architecture

Abstract: This paper presents an efficient real-time variable block size motion estimation architecture. The proposed architecture provides motion vectors for each 16 times 16 block and its 40 sub-blocks. The proposed architecture is a single-instruction multiple-data architecture integrated with embedded SRAMs on one chip. The architecture has been prototyped usingRead More